Digital System design with PLDs and FPGAs Video Lectures

Digital System design with PLDs and FPGAs
'Digital System design with PLDs and FPGAs' Video Lectures by Prof. Kuruvilla Varghese from IISc Bangalore
"Digital System design with PLDs and FPGAs" - Video Lectures
1. Course Contents, Objective
2. Revision of Prerequisite
3. Design of Synchronous Sequential Circuits
4. Analysis of Synchronous Sequential Circuits
5. Top-down Design
6. Controller Design
7. Control algorithm and State diagram
8. Case study 1
9. Entity, Architecture and Operators
10. Concurrency, Data flow and Behavioural models
11. Structural Model, Simulation
12. Simulating Concurrency
13. Classes and Data types
14. Concurrent statements and Sequential statements
15. Sequential statements and Loops
16. Modelling flip-flops, Registers
17. Synthesis of Sequential circuits
18. Libraries and Packages
19. Operators, Delay modelling
20. Delay modelling
21. VHDL Examples
22. VHDL Examples, FSM Clock
23. FSM issues 1
24. FSM Issues 2
25. FSM Issues 3
26. VHDL coding of FSM
27. FSM Issues 4
28. FSM Issues 5
29. Synchronization 1
30. Synchronization 2
31. Evolution of PLDs
32. Simple PLDs
33. Simple PLDs: Fitting
34. Complex PLDs
35. FPGA Introduction
36. FPGA Interconnection, Design Methodology
37. Xilinx Virtex FPGA’s CLB
38. Xilinx Virtex Resource Mapping, IO Block
39. Xilinx Virtex Clock Tree
40. FPGA Configuration
41. Altera and Actel FPGAs
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