Lecture 12 - Modeling of Verilog Sequential Circuits(contd) - NPTEL VLSI Circuits Design

Lecture 12 - Modeling of Verilog Sequential Circuits(contd)

Lecture Series on VLSI Design by Prof S.Srinivasan, Dept of Electrical Engineering, IIT Madras For more details on NPTEl visit nptel.iitm.ac.in - NPTEL (IIT) VLSI Circuits, Design, technology Video Lectures & Tutorials - VLSI Design, Technology Interview Questions, Projects - IIT Video Lectures


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